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Projektseminar 2013

Design of an Evaluation Platform for an Analog-to-Digital Converter ASIC

Author: Ferdinand Keil
Supervisor: M.Sc. Harish Balasubramaniam
Finished: 11.10.2013

test_setup_wo_fpga

Abstract

A modular evaluation platform for a custom high-speed ADC is designed and tested. Four different modules are presented, of which the mainboard is the central one. The high-level design is presented and followed by a detailed description of each module. The modules are tested separately and the results of the evaluation are shown.


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Written by Ferdinand

April 20th, 2014 at 17:10

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